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Am7949
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS n Ideal for Fiber-In-The-Loop (FITL) applications n Low standby power n -21 V to -58 V battery operation n On-chip battery switching and feed selection n On-hook transmission n Two-wire impedance set by single external
impedance
n n n n n n n
Programmable constant-current feed Current gain = 200 Programmable loop-detect threshold Ground-key detector Tip Open state for ground-start lines Polarity reversal option On-chip ring relay driver and relay snubber circuit
BLOCK DIAGRAM
Ring Relay Driver RINGOUT C1 C2 HPA Two-Wire Interface HPB Signal Transmission B(RING) Off-Hook Detector RD Power-Feed Controller DA DB VBAT2 BSW VBAT1 Switch Driver Test Relay Driver Ring-Trip Detector TESTIN TESTOUT RDC CAS Ground-Key Detector E1 DET Input Decoder and Control C3
A(TIP)
VTX RSN
B2EN
AS
VCC
VEE
BGND
AGND/DGND
Publication# 080143 Rev: D Amendment: /0 Issue Date: October 1999
ORDERING INFORMATION Standard Products
Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below.
Am7949
-1
J
C TEMPERATURE RANGE C = Commercial (0C to 70C)*
PACKAGE TYPE J = 32-pin Plastic Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE OPTION -1 = 52 dB Long. Bal., Polarity Reversal -2 = 63 dB Long. Bal., Polarity Reversal -3 = 52 dB Long. Bal., No Polarity Reversal -4 = 63 dB Long. Bal., No Polarity Reversal DEVICE NUMBER/DESCRIPTION Am7949 Subscriber Line Interface Circuit
Valid Combinations -1 -2 -3 -4
Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on Legerity's standard military-grade products.
Am7949
JC
Note: * Functionality of the device from 0C to +70C is guaranteed by production testing. Performance from -40C to +85C is guaranteed by characterization and periodic sampling of production units.
2
Am7949 Data Sheet
CONNECTION DIAGRAMS Top View
32-Pin PLCC
VBAT2 B(RING) BGND A(TIP) VCC
NC
4 TP RINGOUT BSW NC VBAT1 B2EN C2 E1 TESTOUT 5 6 7 8 9 10 11 12
3
2
1
32
31 30 29 28 27 26 25 24 23 22 21 TP DA RD HPB HPA VTX VEE RSN AGND/DGND
13 14 15 C3 DET
16 AS
17 18 19 20 C1 TESTIN RDC CAS
Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate. 3. NC = No Connect
SLIC Products
DB
3
PIN DESCRIPTIONS
Pin Names AGND/DGND AS A(TIP) B2EN BGND B(RING) BSW C3-C1 CAS DA DB DET Type Gnd Input Output Input Gnd Output Battery Switch Input Capacitor Input Input Output Analog and Digital ground. Anti-saturation state select. Logic Low enables battery independent feed. Logic High enables battery tracking anti-sat. TTL compatible. Output of A(TIP) power amplifier. VBAT2 Enable. Logic Low enables low power operation from VBAT2. Logic High enables operation from VBAT1. TTL compatible. Battery (power) ground. Output of B(RING) power amplifier. Battery Switch. Collector of battery switch. Decoder. SLIC control pins. C3 is MSB and C1 is LSB. TTL compatible. Anti-saturation capacitor; pin for capacitor to filter reference voltage when operating in anti-saturation region. Ring-Trip Negative; negative input to ring-trip comparator. Ring-Trip Positive; positive input to ring-trip comparator. Switchhook detector; a logic Low indicates that selected condition is detected. The detect condition is selected by the logic inputs (C3-C1 and E1). The output is open-collector with a built-in 15 k pull-up resistor. Ground-Key enable. A logic High selects the off-hook detector. A logic Low selects the ground key. TTL compatible. High-pass filter capacitor; A(TIP) side of high-pass filter capacitor. High-pass filter capacitor; B(RING) side of high-pass filter capacitor. Pin not internally connected. Detect resistor. Detector threshold set and filter pin. DC feed resistor. Connection point for the DC feed current programming network, which also connects to the receiver summing node (RSN). The sign of VRDC is negative for normal polarity and positive for reverse polarity. Ring relay driver; open-collector driver with emitter internally connected to BGND. Receive summing node; the metallic current (both AC and DC) between A(TIP) and B(RING) is equal to 200 times the current into this pin. The networks that program receive gain, two-wire impedance, and feed resistance all connect to this node. Test relay driver input. Open collector driver with emitter internally connected to AGND. Thermal pin. Connection for heat dissipation. Internally connected to substrate (VBAT). Leave as open circuit or connected to VBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. Battery supply and connection to substrate. Power supply to output amplifiers. Connect externally to BSW. Connect to off-hook battery through a diode. +5 V power supply. -5 V power supply. Transmit audio; this output is a unity gain version of the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. Description
E1 HPA HPB NC RD RDC
Input Capacitor Capacitor ___ Resistor Resistor
RINGOUT RSN
Output Input
TESTIN TESTOUT TP
Input Output Thermal
VBAT1 VBAT2 VCC VEE VTX
Battery Battery Power Power Output
4
Am7949 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Storage temperature . . . . . . . . . . . . -55C to +150C VCC with respect to AGND/DGND . . . -0.4 V to +7.0 V VEE with respect to AGND/DGND . . . +0.4 V to -7.0 V VBAT2 with respect to VBAT1 . . . . . . . . . .VBAT1 to GND VBAT1 with respect to AGND/DGND: Continuous . . . . . . . . . . . . . . . . . . +0.4 V to -70 V 10 ms . . . . . . . . . . . . . . . . . . . . . . +0.4 V to -75 V BGND with respect to AGND/DGND . . . . +3 V to -3 V A(TIP) or B(RING) to BGND: Continuous . . . . . . . . . . . . . . . . . . . . -70 V to +1 V 10 ms (f = 0.1 Hz) . . . . . . . . . . . . . . . -70 V to +5 V 1 s (f = 0.1 Hz) . . . . . . . . . . . . . . . . -80 V to +8 V 250 ns (f = 0.1 Hz) . . . . . . . . . . . . . -90 V to +12 V Current from A(TIP) or B(RING). . . . . . . . . . . . 150 mA RINGOUT current . . . . . . . . . . . . . . . . . . . . . . .50 mA RINGOUT voltage . . . . . . . . . . . . . . . . BGND to +7 V RINGOUT transient . . . . . . . . . . . . . . BGND to +10 V DA and DB inputs Voltage on ring-trip inputs . . . . . . . . . . .VBAT to 0 V Current into ring-trip inputs . . . . . . . . . . . . . . 10 mA C3-C1, E1, AS, B2EN Input voltage . . . . . . . . . . . . .-0.4 V to VCC + 0.4 V Maximum power dissipation, continuous, TA = 85C, No heat sink (See note): In 32-pin PLCC package. . . . . . . . . . . . . . . . 1.4 W Thermal Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JA In 32-pin PLCC package. . . . . . . . . . . . 43C/W typ
Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165C. The device should never be exposed to this temperature. Operation above 145C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices Ambient temperature . . . . . . . . . . . . . . 0C to +70C* VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .4.75 V to 5.25 V VEE . . . . . . . . . . . . . . . . . . . . . . . . .-4.75 V to -5.25 V VBAT1 . . . . . . . . . . . . . . . . . . . . . . . . -40.5 V to -58 V VBAT2 . . . . . . . . . . . . . . . . . . . . . . . . . -21 V to VBAT1 AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V BGND with respect to AGND/DGND. . . . . . . . . . . . -100 mV to +100 mV Load resistance on VTX to ground . . . . . . . 10 k min
Operating Ranges define those limits between which device functionality is guaranteed. * Functionality of the device from 0C to +70C is guaranteed by production testing. Performance from -40C to +85C is guaranteed by characterization and periodic sampling of production units.
SLIC Products
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ELECTRICAL CHARACTERISTICS
Description Transmission Performance 2-wire return loss ZVTX, Analog output impedance VVTX, Analog output offset voltage 0C to +70C -40C to +85C ZRSN, Analog input impedance Overload level, 2-wire and 4-wire Overload level THD (Total Harmonic Distortion) THD, on-hook Active state On-hook, RL = 600 +3 dBm, BAT2 = -24 V 0 dBm, RL = 600 , BAT1 = -57.5 V 200 Hz to 1 kHz normal polarity 0C to +70C normal polarity -40C to +85C reverse polarity 1 kHz to 3.4 kHz normal polarity 0C to +70C normal polarity -40C to +85C reverse polarity Longitudinal signal generation 4-L Longitudinal current per pin (A or B) Longitudinal impedance at A or B Idle Channel Noise C-message weighted noise Psophometric weighted noise RL = 300 DC RL = 300 DC RL = 300 DC RL = 300 DC 0C to +70C -40C to +85C 0C to +70C -40C to +85C +7 -83 +10 +12 -80 -78 dBrnC dBmp -- 4 -- 4 200 Hz to 800 Hz normal polarity Active or OHT state 0 to 100 Hz -1, -3* -2, -4 -2, -4 -2, -4 -1, -3* -2, -4 -2, -4 -2, -4 52 63 58 54 52 58 54 54 42 12 18 35 mArms /pin dB 2.5 0.88 -64 -50 -35.5 dB 5 -- -- -- 4 -- -- -- 4 -- -35 -40 1 200 Hz to 3.4 kHz (Test Circuit D) 26 3 20 +35 +40 20 dB mV Vpk Vrms 1, 4, 7 4 -- 4 4 2a 2b Test Conditions (See Note 1) Min Typ Max Unit Note
Longitudinal Performance (See Test Circuit D) Longitudinal to metallic L-T, L-4
Insertion Loss and Balance Return Signal (2- to 4-Wire, 4- to 2-Wire, and 4- to 4-Wire, See Test Circuits A and B) Gain accuracy over temperature Gain accuracy over frequency Gain tracking Gain accuracy, OHT state Group delay Note: *P.G. = Performance Grade 0 dBm, 1 kHz 0 dBm, 1 kHz 300 to 3400 Hz relative to 1 kHz 0C to +70C -40C to +85C 0C to +70C -40C to +85C -0.15 -0.20 -0.10 -0.15 -0.10 -0.15 -0.5 0 0 +0.15 +0.20 +0.10 +0.15 +0.10 +0.15 +0.5 3 s dB -- 4 -- 4 -- 4 4 1, 4, 7
+3 dBm to -55 dBm 0C to +70C relative to 0 dBm -40C to +85C
6
Am7949 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description Line Characteristics IL, Loop current accuracy IL, Accuracy, Standby state IL in constant-current region 0.915IL 20 0.7IL TA = 25C 15 17.4 50 50 80 4 100 100 30 30 -7.5 42.8 -5 V A mA 4 IL 21.7 IL 1.3IL mA 1.085IL IL, Long loops, Active or OHT state RLDC = 600 Test Conditions (See Note 1) Min Typ Max Unit Note
V BAT - 3 V I L = --------------------------------RL + 1800
RL = 600
ILLIM
Active, A and B to GND OHT, A and B to GND RL = 0 B to GND B to VBAT1 + 6 V A to -48 V = 7 k, B to GND = 100 VBAT1 = -51.6 V 50 Hz to 3400 Hz 50 Hz to 3400 Hz 50 Hz to 3400 Hz CAS pin to GND AS & B2EN = logic high AS & B2EN = logic high AS & B2EN = logic high AS & B2EN = logic high AS & B2EN = logic low, RL = 600 AS & B2EN = logic low, RL = 300 AS & B2EN = logic low, RL = 300 Open Circuit state OHT state Standby state Active state, BAT1 = -50 V Open Circuit state OHT state Standby state Active state, BAT1 = -50 V
IL, Loop current, Open Circuit state RL = 0 IA, pin A leakage, Tip Open state IB, pin B current, Tip Open state VA, Active, ground-start signaling VAB, Open Circuit voltage VCC VEE VBAT Effective internal resistance Power Dissipation On-hook, Open Circuit state On-hook, Standby state On-hook, OHT state On-hook, Active state Off-hook, Standby state Off-hook, OHT state Off-hook, Active state Supply Currents, Battery = -58 V ICC, On-hook VCC supply current 2.0 5.3 2.3 5.5 0.82 2.0 1.1 2.0 0.45 2.2 0.8 2.8 35 45 120 160 860 500 500
Power Supply Rejection Ratio (VRIPPLE = 100 mVrms), Active Normal State 33 29 30 85 40 35 50 170 255 70 85 220 230 1100 700 700 mW dB k 5 4
3.0 7.5 3.5 8.0 2.0 3.5 2.0 4.0 1.0 4.0 2.0 4.0
IEE, On-hook VEE supply current
mA
IBAT, On-hook VBAT supply current Open Circuit state OHT state Standby state Active state, BAT1 = -50 V
SLIC Products
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ELECTRICAL CHARACTERISTICS (continued)
Description RFI Rejection RFI rejection 100 kHz to 30 MHz (See Figure E) C3-C1, E1, AS, B2EN TESTIN, IIH = 300 A C3-C1, AS, B2EN Input E1 C1, C2, C3, E1, AS B2EN IOUT = 0.8 mA, 15 k to VCC IOUT = -0.1 mA, 15 k to VCC 2.4 -500 Source resistance = 2 M B to GND B to GND RD = 35.4 k, IT = 375/RD IOL = 30 mA IOL = 30 mA, VTESTINmin = 4.0 V VOH = +5 V IZ = 100 A IZ = 30 mA 6 7.2 10 V V 9.6 -50 2 -50 0 5 9 10.6 11.6 +50 10 2.0 4.5 0.8 -75 -75 -400 -600 0.40 V 40 45 A 1.0 mVrms 4 Test Conditions (See Note 1) Min Typ Max Unit Note
Logic Inputs (C3-C1, E1, AS, and B2EN) VIH, Input High voltage VIL, Input Low voltage IIH, Input High current Input High current IIL, Input Low current Logic Output (DET) VOL, Output Low voltage VOH, Output High voltage Ring-Trip Detector Input (DA, DB) Bias current Offset voltage Ground-Key Detector Thresholds Ground-key resistive threshold Ground-key current threshold Loop Detector IT, Loop-detect threshold VOL, On voltage, (RINGOUT) VOL, On voltage, (TESTOUT) IOH, Off leakage Zener breakover Zener On voltage mA k mA nA mV 6 V
Relay Driver Output (RINGOUT/TESTOUT) +0.25 +0.6 +0.4 +1.0 100 V A
RELAY DRIVER SCHEMATICS
RINGOUT
TESTOUT
BGND
AGND
8
Am7949 Data Sheet
SWITCHING CHARACTERISTICS
Symbol Parameter E1 Low to DET High (E0 = 1) tgkde E1 Low to DET Low (E0 = 1) E1 High to DET Low (E0 = 1) tshde E1 High to DET High (E0 = 1) Switchhook Detect state 0C to +70C -40C to +85C 3.8 4.0 Ground-Key Detect state RL open, RG connected (See Figure H) Test Conditions Temperature Ranges 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C Min Typ Max 3.8 4.0 1.1 1.6 1.2 1.7 Unit Note
s
4
SWITCHING WAVEFORMS
E1 to DET E1
DET tgkde tshde tgkde tshde
Notes: 1. Unless otherwise noted, test conditions are BAT1 = -52 V, BAT2 = -24 V, VCC = +5 V, VEE = -5 V, RL = 600 , RDC1 = RDC2 = 10 k, RD = 35.4 k, no fuse resistors, CHP = 0.33 F, CDC = 0.33 F, CCAS = 0.33 F, D1 = 1N400x, two-wire AC input impedance is a 600 resistance synthesized by the programming network shown below. VTX RT1 = 60 k
CT1 = 150 pF RT2 = 60 k RSN RRX = 60 k 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5% 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 source impedance. 2 M is specified for system design only. 7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1 above. The network reduces the group delay to less than 2 s. The effect of group delay on the linecard performance may also be compensated for by synthesizing complex impedance with the QSLACTM or DSLACTM device. ~ VRX
SLIC Products
9
Table 1. SLIC Decoding
(DET) Output State 0 1 2 3 4 5 6* 7* C3 C2 C1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 2-Wire Status Open Circuit Ringing Active On-hook TX (OHT) Tip Open Standby Active Polarity Reversal OHT Polarity Reversal E1 = 1 Ring trip Ring trip Loop detector Loop detector Loop detector Loop detector Loop detector Loop detector E1 = 0 Ring trip Ring trip Ground key Ground key Ground key Ground key Ground key Ground key B2EN = 1** VBAT1 B2EN B2EN Battery Selection
Notes: * Only -1 performance grade devices support polarity reversal. ** For correct ground-start operation using Tip Open, VBAT1 on-hook battery must be used.
Table 2.
AS 0 1 1 B2EN 0 0 1
Battery Switching Decoding
Operation Status
Battery independent anti-sat, off-hook battery Battery dependent anti-sat, off-hook battery Battery dependent anti-sat, on-hook battery
Note: BSW and VBAT2 are connected together externally.
Table 3.
ZT = 200 ( Z 2WIN - 2RF )
User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ILOOP is the desired loop current in the constant-current region.
ZL 200 * ZT Z RX = ----------- * ------------------------------------------------G 42L ZT + 200 ( ZL + 2RF )
500 R DC1 + R DC2 = ------------I LOOP R DC1 + R DC2 C DC = 1.5 ms * ------------------------------R DC1 * R DC2 375 R D = -------- , IT 0.5 ms CD = -----------------RD
RD and CD form the network connected from RD to -5 V and IT is the threshold current between on-hook and off-hook. CCAS is the regulator filter capacitor and fc is the desired filter cut-off frequency.
1 C CAS = ---------------------------5 3.4 * 10 f c
10
Am7949 Data Sheet
DC FEED CHARACTERISTICS
5
VBAT = 51.3 V VBAT = 47.3 V
3 7
2
3 4 2 6 1
RDC = 20 k Notes: 1. Constant-current region: 2. Anti-sat turn-on point:
500 I L = --------R DC V AB = 12.5 V, Low-Battery Anti-sat 500 V AB = 1.01 V BAT - 7.51 - -------- , High-Battery Anti-sat, V BAT < 50.1 V 60 500 V AB = 0.338 V BAT + 26.0 - -------- , High-Battery Anti-sat, V BAT > 50.1 V 60
3. Open Circuit voltage:
V AB = 16.7 V, Low-Battery Anti-sat V AB = 1.01 V BAT - 7.51 , High-Battery Anti-sat, V BAT < 50.1 V V AB = 0.338 V BAT + 26.0 , High-Battery Anti-sat, V BAT > 50.1 V
4. Anti-sat region, Low battery state:
R DC V AB = 16.7 - I L --------120 R DC V AB = 1.01 V BAT - 7.51 - I L --------- , V BAT < 50.1 V 60 R DC V AB = 0.338 V BAT + 26.0 - I L --------- , V BAT > 50.1 V 60
5. Anti-sat region, High battery state:
6. Loop resistance at transition between High and Low battery states.
7. DC feed characteristic through High/Low battery transitions, High/Low battery states controlled by on/off-hook states. a. VA-VB (VAB) Voltage vs. Loop Current (Typical)
SLIC Products
11
30 25
Loop Current (mA)
20 15 10 5 0
1000 2000 3000 4000 ( ) 5000 6000
RDC = 20 k VBAT: High = 51.3 V Low = 24 V
Load Resistance
b. Loop Current vs. Load Resistance (Typical)
A
a RL IL SLIC RSN RDC1 b RDC2 B RDC CDC
Feed current programmed by RDC1 and RDC2 c. Feed Programming
Figure 1. DC Feed Characteristics
12
Am7949 Data Sheet
TEST CIRCUITS
A(TIP) VTX RL 2 VL RL 2 RSN B(RING) IL2-4 = 20 log (VTX / VAB) VAB SLIC AGND RT VAB RL SLIC AGND RT A(TIP) VTX
RRX RRX B(RING) RSN VRX IL4-2 = 20 log (VAB / VRX) BRS = 20 log (VTX / VRX)
A. Two- to Four-Wire Insertion Loss
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
1 C
<< RL S1 C
A(TIP) RL 2 VL VAB
VTX
ZD
A(TIP) VTX RT1 AGND
SLIC AGND RT VS S2 RSN B(RING) RRX VRX
R VM R SLIC ZIN RSN B(RING)
VL
RL 2
RT2
CT1
S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) L-4 Long. Bal. = 20 log (VTX / VL) S2 Closed, S1 Open 4-L Long. Sig. Gen. = 20 log (VL / VRX)
RRX
Note: ZD is the desired impedance (e.g., the characteristic impedance of the line). RL = -20 log (2 VM / VS) C. Longitudinal Balance D. Two-Wire Return Loss Test Circuit
SLIC Products
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TEST CIRCUITS (continued)
VCC 6.2 k A(TIP)
A(TIP) DET RL = 600 15 pF B(RING)
RG B(RING) E1
RG: 2 k at VBAT = -48 V
E. Loop-Detector Switching
F. Ground-Key Switching
C1 L1 200
RF1 50 A(TIP) CAX 33 nF
200 HF GEN 50
RF2 50 B(RING)
L2
C2
CBX 33 nF
VTX SLIC under test
1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz
G. RFI Test Circuit
14
Am7949 Data Sheet
TEST CIRCUITS (continued)
-5 V +5 V DA VCC VEE RD RD VTX A(TIP) HPA CHP B(RING) 2.2 nF RDC CDC RINGOUT AGND/ DGND BGND AS B2EN D1 BAT1 = -52 V 0.1 F VBAT2 BAT2 = -24 V 0.1 F D2 BSW ANALOG GROUND VBAT1 C3 C2 C1 E1 DET CAS BATTERY GROUND HPB B(RING) RDC1 RSN RDC2 RT RRX VRX VTX
DB 2.2 nF A(TIP)
CCAS
DIGITAL GROUND
H. Am7949 Test Circuit
SLIC Products
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PHYSICAL DIMENSIONS
PL032
.447 .453 .485 .495 .009 .015 .125 .140 .080 .095 SEATING PLANE .400 REF. .013 .021 .026 .032 TOP VIEW .050 REF. .490 .530 .042 .056
.585 .595 .547 .553
Pin 1 I.D.
SIDE VIEW
16-038FPO-5 PL 032 DA79 6-28-94 ae
REVISION SUMMARY Revision A to Revision B
* * * * * Minor changes were made to the data sheet style and format to conform to Legerity standards. Electrical Characteristics--Under Longitudinal Performance, the specifications for Longitudinal to Metallic moved from the Typ column to the Min column. Electrical Characteristics--Under Line Characteristics (the last row) in the Test Conditions column, V BAT1 = 50 V changed to V BAT1 = 51.6 V. SLIC Decoding Table--Added B2EN reference to the Battery Selection column and its corresponding note to the notes section. DC Feed Characteristics--Added new equations and revised existing ones.
Revision B to Revision C
* * Minor changes were made to the data sheet style and format to conform to Legerity standards. In Pin Description table, inserted/changed TP pin description to: "Thermal pin. Connection for heat dissipation. Internally connected to substrate (VBAT). Leave as open circuit or connected to VBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation."
Revision C to Revision D
* * * The physical dimensions (PL032) were added to the Physical Dimensions section. Deleted the Ceramic DIP and Plastic DIP packages and references to them. Updated the Pin Description table to correct inconsistencies.
16
Am7949 Data Sheet
Notes:
www.legerity.com
SLIC Products
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Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers' products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places Legerity in a class by itself.
The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice.
(c) 1999 Legerity, Inc. All rights reserved.
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